Electronic Devices: JEE Main Physics formulas and notes

Q: How do I solve “Classify a solid from its band gap or resistivity” questions in JEE Main?

The gap or the resistivity of a material is given. Say whether it is a conductor, a semiconductor or an insulator. 1. Eg = 0 (overlap) is a conductor. 2. 0 3 eV is an insulator. Example: Eg = 1.1 eV: semiconductor (Si).

Electronic Devices gives 2 or 3 questions in JEE Mains nearly every year, and most of them are quick. You are asked to classify a solid, find the output of a logic network, say what a rectifier does to the frequency, find the current in a diode circuit, or calculate a Zener current. The chapter is mostly facts and short calculations. About 6 hours over 4 days is enough, and logic gates are the easiest marks.

Practise this chapter free in Rank mode

Open Physica, choose Rank mode, JEE Mains, then Physics and this chapter for the guide, formulas, most-asked questions, past-year questions and a mock test.

Quick revision

Conductor: bands overlap; semiconductor: Eg < 3 eV (Si 1.1, Ge 0.67); insulator: Eg > 3 eV; λ = 1240/Eg nm
Pentavalent (P, As) gives n-type, electrons are the majority; trivalent (B, Al) gives p-type, holes are the majority; the crystal stays neutral
nₑ nₕ = nᵢ²; I = e A (nₑ vₑ + nₕ vₕ); v = μE; σ = e (nₑ μₑ + nₕ μₕ)
Junction: depletion layer, barrier V₀ (Si 0.7 V, Ge 0.3 V), field from n to p; forward bias narrows it, reverse bias widens it
I–V curve: forward knee at 0.7 V (Si), reverse leakage in μA, then breakdown; r = ΔV/ΔI
Ideal diode: forward is a wire, reverse is a gap; a real Si diode drops 0.7 V; a reverse diode cuts its branch
Half-wave: f_out = f, Vdc = Vm/π; full-wave: f_out = 2f, Vdc = 2Vm/π; PIV: Vm (half, bridge), 2Vm (centre-tap)
Zener regulator: reverse biased, Vout = Vz, I = (V − Vz)/Rs = Iz + I_L; Iz is least at the lowest V and the largest load
LED forward, λ = 1240/Eg; photodiode reverse, current ∝ light; solar cell unbiased, fourth quadrant, η = Pm/Pin
OR any, AND all, NOT opposite; NAND/NOR flip AND/OR; De Morgan: NOT(A + B) = A̅B̅; NAND and NOR are universal

Formulas with solved examples

Energy bands and types of solids

Conductors, semiconductors and insulators

in a solid the allowed energies form bands: the valence band (VB, filled with the bonding electrons) and the conduction band (CB, free electrons)
the forbidden gap Eg lies between the top of the VB and the bottom of the CB
conductor: bands overlap or the CB is partly filled, so Eg = 0
semiconductor: Eg < 3 eV (Si 1.1 eV, Ge 0.67 eV)
insulator: Eg > 3 eV (diamond about 5.4 eV)
resistivity: conductors ρ < 10⁻⁵ Ω m, semiconductors 10⁻⁵ to 10⁶ Ω m, insulators ρ > 10⁸ Ω m

How to apply. Look at the gap: none, small or large. At 0 K a pure semiconductor has a full VB and an empty CB, so it behaves as an insulator.

Example. Si has Eg = 1.1 eV and Ge has 0.67 eV, so both are semiconductors; diamond with 5.4 eV is an insulator.

Band gap and wavelength of light

a photon can lift an electron across the gap if hf ≥ Eg
the longest such wavelength is λmax = (hc)/(Eg) = (1240)/(Eg in eV) nm
for Si, λmax = (1240)/(1.1) = 1127 nm; for Ge, (1240)/(0.67) = 1851 nm
light of a longer wavelength is not absorbed in this way
the same relation gives the colour of the light from an LED, λ = (1240)/(Eg) nm

How to apply. Divide 1240 by the gap in eV and you get the wavelength in nm. A larger gap means a shorter wavelength.

Example. Si: λmax = 1240 ÷ 1.1 = 1127 nm, which is in the infrared. A red LED with Eg = 1.9 eV gives λ = 1240 ÷ 1.9 = 653 nm.

Effect of temperature on resistance

metal: resistance rises with T (the collisions increase, the number of free electrons stays nearly constant)
semiconductor: resistance falls with T (more electron–hole pairs are produced, so n rises faster than the collisions)
temperature coefficient of resistance: positive for metals, negative for semiconductors
at 0 K a pure semiconductor is an insulator

How to apply. For a statement about heating, name the carriers: metals keep the same number of carriers and lose speed; semiconductors gain carriers.

Example. Heating a piece of germanium from 300 K to 350 K makes its resistance fall; heating a copper wire makes it rise.

Pair generation and recombination

heat or light with hf ≥ Eg lifts an electron from the VB to the CB and leaves a hole in the VB
this is the creation of an electron–hole pair
an electron falling back into a hole is recombination
in steady state the rate of generation equals the rate of recombination
a hole is a missing electron: it behaves as a particle of charge +e that moves opposite to the electrons

How to apply. Count pairs: one electron in the CB always means one hole in the VB in a pure crystal.

Example. Light of 600 nm (2.07 eV) on silicon (1.1 eV) makes pairs; light of 1500 nm (0.83 eV) does not.

Intrinsic and extrinsic semiconductors

Intrinsic semiconductor

a pure crystal such as Si or Ge (4 valence electrons, covalent bonds)
nₑ = nₕ = nᵢ
at 300 K, nᵢ ≈ 1.5 × 10¹⁶ m⁻³ for Si, a very small fraction of the 5 × 10²⁸ atoms per m³
conductivity is small and rises quickly with temperature
the current is carried by both electrons and holes in equal numbers

How to apply. Remember nₑ = nₕ for a pure crystal. Whenever the question says pure or intrinsic, the two concentrations are equal.

Example. In pure Si, nₑ = nₕ = 1.5 × 10¹⁶ m⁻³ and so nₑnₕ = 2.25 × 10³² m⁻⁶.

n-type semiconductor

doped with a pentavalent atom (P, As, Sb) which gives one extra electron per atom, called a donor
the donor level lies just below the CB, so the extra electrons enter the CB easily at room temperature
majority carriers: electrons; minority carriers: holes
nₑ ≫ nₕ and nₑ ≈ N_D (the donor concentration)
the crystal is still electrically neutral

How to apply. Pentavalent means n-type. The majority carriers are electrons; the donor atom becomes a fixed positive ion.

Example. Si doped with 5 × 10²² m⁻³ of phosphorus: nₑ ≈ 5 × 10²² m⁻³ and the hole concentration becomes small, about 4.5 × 10⁹ m⁻³.

p-type semiconductor

doped with a trivalent atom (B, Al, Ga, In) which has one bond missing, called an acceptor
the acceptor level lies just above the VB, so electrons from the VB fill it easily and leave holes
majority carriers: holes; minority carriers: electrons
nₕ ≫ nₑ and nₕ ≈ N_A (the acceptor concentration)
the crystal is still electrically neutral; the acceptor becomes a fixed negative ion

How to apply. Trivalent means p-type. A hole moves as a positive charge, but the crystal as a whole has no net charge.

Example. Si doped with 2 × 10²² m⁻³ of boron: nₕ ≈ 2 × 10²² m⁻³ and nₑ = 2.25 × 10³² ÷ 2 × 10²² = 1.1 × 10¹⁰ m⁻³.

What doping does to the energy picture

n-type: a donor level a little below the CB (the gap to the CB is about 0.01 eV to 0.05 eV)
p-type: an acceptor level a little above the VB
the doping is small, about 1 atom in 10⁶ to 10⁸, yet it raises the conductivity thousands of times
a doped crystal has more charge carriers than a pure one at the same temperature

How to apply. Draw the band picture: a donor level just under the CB for n-type, an acceptor level just over the VB for p-type.

Example. Adding one atom of arsenic per 10⁷ atoms of Si gives about 5 × 10²¹ electrons per m³, far more than the intrinsic 1.5 × 10¹⁶.

Compensated and mixed doping

if both donors and acceptors are present, the larger concentration wins
net n-type if N_D > N_A, with nₑ ≈ N_D − N_A
net p-type if N_A > N_D, with nₕ ≈ N_A − N_D
charge neutrality: nₑ + N_A = nₕ + N_D

How to apply. Subtract the smaller doping from the larger one; the answer is the majority concentration.

Example. N_D = 8 × 10²² m⁻³ and N_A = 3 × 10²² m⁻³: the crystal is n-type with nₑ ≈ 5 × 10²² m⁻³.

Carriers, mobility and current

Law of mass action

nₑ nₕ = nᵢ²
this holds in pure and in doped crystals at a given temperature
doping with donors raises nₑ and lowers nₕ in exactly the same proportion that makes the product nᵢ²
so the minority concentration is nₕ = (nᵢ²)/(nₑ) in an n-type crystal and nₑ = (nᵢ²)/(nₕ) in a p-type crystal

How to apply. Find the majority concentration from the doping, then divide nᵢ² by it to get the minority concentration.

Example. Si with nᵢ = 1.5 × 10¹⁶ m⁻³ and nₑ = 5 × 10²² m⁻³: nₕ = 2.25 × 10³² ÷ 5 × 10²² = 4.5 × 10⁹ m⁻³.

Current in a semiconductor

I = e A (nₑ vₑ + nₕ vₕ) = Iₑ + Iₕ
the electron and hole currents add, because the electrons drift one way and the holes the other way, and both give current in the same direction
for an n-type crystal Iₑ ≫ Iₕ, so I ≈ e A nₑ vₑ
for a p-type crystal I ≈ e A nₕ vₕ
current density J = e (nₑ vₑ + nₕ vₕ)

How to apply. Write the two terms separately, put the same A and e in both, and add. For doped crystals one term is usually negligible.

Example. A = 1 mm², nₑ = 5 × 10²⁰ m⁻³, nₕ = 4 × 10²⁰ m⁻³, vₑ = 0.5 m/s, vₕ = 0.2 m/s: I = 1.6 × 10⁻¹⁹ × 10⁻⁶ × (2.5 × 10²⁰ + 0.8 × 10²⁰) = 5.28 × 10⁻⁵ A = 52.8 μA.

Mobility and conductivity

drift speed v = μE
σ = e (nₑ μₑ + nₕ μₕ) and ρ = (1)/(σ)
μ in m²/(V s)
for Si: μₑ = 0.135 and μₕ = 0.048 m²/(V s), so electrons move faster than holes in the same field
in a doped crystal σ ≈ e nₑ μₑ (n-type) or e nₕ μₕ (p-type)

How to apply. Use v = μE to turn a field into a drift speed, then put it in I = eA(nₑvₑ + nₕvₕ).

Example. Pure Si in E = 200 V/m: vₑ = 0.135 × 200 = 27 m/s, vₕ = 9.6 m/s. With A = 1 mm²: I = 1.6 × 10⁻¹⁹ × 10⁻⁶ × 1.5 × 10¹⁶ × (27 + 9.6) = 8.8 × 10⁻⁸ A = 88 nA.

Conductivity of a doped crystal

σ = e (nₑ μₑ + nₕ μₕ)
intrinsic: σ = e nᵢ (μₑ + μₕ)
n-type σ ≈ e N_D μₑ
p-type σ ≈ e N_A μₕ
for equal doping n-type conducts better than p-type, because μₑ > μₕ

How to apply. Ignore the minority carriers unless the question asks for them; they are smaller by a factor of about 10¹² here.

Example. Intrinsic crystal with n = 2 × 10¹⁹ m⁻³, μₑ = 0.39 and μₕ = 0.19 m²/(V s): σ = 1.6 × 10⁻¹⁹ × 2 × 10¹⁹ × 0.58 = 1.86 S/m.

Diffusion current and drift current

drift current: carriers move because of an electric field (I = e A n μ E)
diffusion current: carriers move from a region of high concentration to low concentration, with no field needed
in a p-n junction these two currents are in opposite directions and cancel at equilibrium
diffusion is mostly majority carriers; drift is mostly minority carriers

How to apply. Name the cause: field gives drift, concentration difference gives diffusion.

Example. At the junction the holes of the p side diffuse into the n side (diffusion), while the field of the depletion layer pushes minority holes back (drift).

The p-n junction

Formation of the depletion layer

electrons diffuse from the n side to the p side, holes from the p side to the n side
they recombine near the junction
fixed positive donor ions are left on the n side and fixed negative acceptor ions on the p side
this region has no mobile carriers: the depletion layer, about 1 μm thick
its electric field points from n to p and stops further diffusion
at equilibrium the diffusion current equals the drift current and the net current is zero

How to apply. The depletion layer is bare: only fixed ions, no free carriers. Its field always opposes the diffusion of the majority carriers.

Example. A p-n junction in a closed loop with no battery carries no current, because diffusion and drift balance.

Barrier potential and the field

the potential difference across the depletion layer is the barrier potential V₀: Si about 0.7 V, Ge about 0.3 V
field E ≈ (V₀)/(d) across a layer of width d
the barrier is higher for heavier doping
V₀ cannot be measured by connecting a voltmeter across the diode, since the contact potentials cancel it

How to apply. Divide the barrier potential by the width to get the field. The potential on the n side is higher than on the p side.

Example. V₀ = 0.7 V across d = 1 μm: E = 0.7 ÷ 10⁻⁶ = 7 × 10⁵ V/m.

Forward bias

p side to the positive terminal of the battery, n side to the negative
the applied voltage opposes the barrier, so the barrier becomes V₀ − V
the depletion layer becomes thinner
majority carriers cross the junction, giving a current of the order of mA
the current rises sharply once V exceeds about 0.7 V (Si) or 0.3 V (Ge)
the diode conducts and has a small resistance

How to apply. Check the polarity: p to + is forward. In the forward direction the barrier falls, the layer narrows and the current is large.

Example. A Si diode with 0.5 V forward bias: the barrier is 0.7 − 0.5 = 0.2 V and the current is small; at 0.8 V the current is large.

Reverse bias

p side to the negative terminal, n side to the positive
the applied voltage adds to the barrier, which becomes V₀ + V
the depletion layer becomes wider
only minority carriers cross, so the reverse current is very small (μA or nA) and almost independent of V
the diode does not conduct and has a very large resistance
at the breakdown voltage the current suddenly becomes large

How to apply. Reverse bias means a wide depletion layer and a tiny current, even for a large voltage, until breakdown.

Example. A Si diode reverse biased with 5 V: the barrier is 5.7 V and the current is a few μA at most.

Diode characteristics and ideal-diode circuits

I–V characteristic

forward: the current is small until the knee voltage (about 0.7 V for Si, 0.3 V for Ge) and then rises steeply (exponentially)
reverse: a small constant current (μA) until the breakdown voltage
the curve is not a straight line: a diode does not obey Ohm’s law
the characteristic is drawn with the forward current in mA and the reverse current in μA

How to apply. On the graph, read the knee on the positive voltage axis and the breakdown on the negative axis. Ge starts to conduct earlier than Si.

Example. On the curve of a Si diode, the current at 0.5 V is almost zero, while at 0.8 V it is many mA.

Dynamic (a.c.) resistance

r = (ΔV)/(ΔI) at the working point (the slope of the I–V curve is 1/r)
in the forward region r is small (a few ohms to tens of ohms)
in the reverse region r is very large (MΩ)
static resistance is V/I at a point and is different from r

How to apply. Pick two nearby points on the steep part of the curve and divide the change of voltage by the change of current.

Example. The current changes from 10 mA to 20 mA when V changes from 0.70 V to 0.80 V: r = 0.1 ÷ 0.010 = 10 Ω.

Zener breakdown and avalanche breakdown

Zener breakdown: in a heavily doped diode the depletion layer is very thin, so a small reverse voltage (below about 6 V) gives a very strong field that pulls electrons out of the bonds
avalanche breakdown: in a lightly doped diode, above about 6 V, fast carriers knock out more carriers and the current multiplies
after breakdown the reverse voltage stays nearly constant while the current changes by a large amount
this property is used in the Zener diode

How to apply. Remember the use, not the details: in breakdown the voltage across the Zener is fixed at Vz.

Example. A Zener diode of Vz = 6 V stays at about 6 V while its reverse current changes from 5 mA to 20 mA.

Ideal diode rules for circuits

forward biased (the anode at a higher potential than the cathode): treat as a short circuit, zero resistance, zero drop
reverse biased: treat as an open circuit, no current
for a real silicon diode, the forward drop is 0.7 V (Ge 0.3 V)
method: assume each diode is on or off, find the current and check that the assumption fits the polarity

How to apply. Guess the state of each diode, replace it by a wire or a gap, solve, then check the sign of the current and the voltage.

Example. A 5 V battery, a forward ideal diode and 1 kΩ: I = 5 ÷ 1000 = 5 mA. With a real Si diode: I = (5 − 0.7) ÷ 1000 = 4.3 mA.

Diodes in series and in parallel

a reverse-biased diode in a branch removes that branch: no current flows in it
two forward diodes in series drop 0.7 V + 0.7 V = 1.4 V (Si)
two forward Si diodes in parallel share the current and keep the drop at 0.7 V
a Ge diode (0.3 V) in parallel with a Si diode (0.7 V) conducts first and holds the voltage at 0.3 V, so the Si diode stays off
the voltage across a conducting real diode is fixed at 0.7 V, whatever the current

How to apply. Mark the branches that are cut by a reverse diode and then use the series–parallel rules for the rest.

Example. A 10 V battery feeds a 2 kΩ resistor, which divides into two branches, each with a 3 kΩ resistor and an ideal diode, one forward and one reversed. Only one branch conducts: I = 10 ÷ (2 + 3) kΩ = 2 mA.

Voltage drop across a diode in a loop

if the source voltage is below the knee voltage the diode current is nearly zero
with several sources, the diode conducts only if the anode is at least 0.7 V (real Si) above the cathode
the potential of the point between a resistor and a conducting diode is clamped by the diode
in a clipping circuit the output follows the input only up to the diode voltage

How to apply. To find the output of a clipper, compare the input with the diode voltage in each half cycle.

Example. A Si diode in parallel with the output (series resistor) clips the positive peaks at +0.7 V: a 5 V peak input gives a +0.7 V peak at the output.

Rectifiers and the Zener regulator

Half-wave rectifier

one diode in series with the load
conducts in the positive half cycles only
output is a series of positive pulses with the same frequency as the input: f_out = f_in
for 50 Hz mains, the output is 50 Hz
Vdc = (Vm)/(π) = 0.318 Vm and Vrms = (Vm)/(2)
ripple factor r = 1.21
efficiency about 40 %

How to apply. Count the humps per input cycle: one hump per cycle gives the same frequency as the input.

Example. Vm = 10 V: Vdc = 10 ÷ π = 3.18 V and Vrms = 5 V. A 50 Hz supply gives 50 Hz pulses.

Full-wave rectifier

two diodes with a centre-tapped transformer (or four diodes in a bridge)
each half cycle one diode conducts, so the current in the load always has one direction
f_out = 2 f_in
for 50 Hz mains, the output is 100 Hz
Vdc = (2Vm)/(π) = 0.637 Vm and Vrms = (Vm)/(√(2))
ripple factor r = 0.48
efficiency about 81 %

How to apply. The full-wave circuit has twice as many humps. The dc value is double the half-wave value.

Example. Vm = 10 V: Vdc = 20 ÷ π = 6.37 V and Vrms = 10 ÷ √2 = 7.07 V. A 50 Hz supply gives 100 Hz output.

Bridge rectifier and peak inverse voltage

bridge: four diodes, two conduct in each half cycle, so the peak output is Vm − 2 × 0.7 V for Si
centre-tap: one diode conducts, the output peak is Vm of half the winding minus 0.7 V
peak inverse voltage (PIV): half-wave Vm, centre-tap full-wave 2Vm, bridge Vm
the diode must have a reverse breakdown voltage larger than the PIV

How to apply. For a real diode subtract 0.7 V once per diode in the path of the current, and for the PIV remember the factor 2 only for the centre-tapped circuit.

Example. A transformer secondary of 12 V rms has Vm = 12√2 = 16.97 V. A half-wave Si circuit gives a peak output of 16.97 − 0.7 = 16.3 V; a bridge gives 16.97 − 1.4 = 15.6 V.

Filter capacitor and ripple

a capacitor across the load charges to the peak and discharges slowly through R between the peaks
the ripple (peak to peak) ΔV ≈ (I)/(f_out C) = (I T_out)/(C)
a large C and a large f_out reduce the ripple
ripple factor r = (V_ac (rms))/(V_dc)
the full-wave circuit needs a smaller C than the half-wave circuit for the same ripple

How to apply. The capacitor loses charge ΔQ = I × T between the peaks, so ΔV = ΔQ/C.

Example. Full-wave output of 100 Hz, I = 20 mA and C = 1000 μF: ΔV = 0.020 ÷ (100 × 10⁻³) = 0.2 V.

Zener diode as a voltage regulator

the Zener diode is connected in reverse bias across the load, with a series resistor Rs
in breakdown, Vout = Vz is nearly constant
I = (V_in − Vz)/(Rs) and I_L = (Vz)/(R_L) and I = Iz + I_L
power in the Zener Pz = Vz Iz
if V_in rises, I and Iz rise and Vout stays at Vz; if the load current rises, Iz falls

How to apply. Find I in Rs first, then I_L from the load, and subtract to get Iz. The Zener takes what the load does not.

Example. V_in = 15 V, Vz = 10 V, Rs = 500 Ω, R_L = 2 kΩ: I = 5 ÷ 500 = 10 mA, I_L = 10 ÷ 2000 = 5 mA, Iz = 5 mA and Pz = 10 × 5 mA = 50 mW.

Limits of the Zener regulator

the regulator works only while Iz stays between a minimum (about 1 mA, the breakdown is lost below this) and a maximum (set by the power rating)
greatest load current: when Iz is at its minimum, I_L(max) = I − Iz(min)
greatest Iz: no load or smallest load and the highest V_in, Iz(max) = (V_in(max) − Vz)/(Rs)
if R_L is open, Iz = I
if V_in < Vz the Zener does not break down and Vout = V_in × (R_L)/(Rs + R_L)

How to apply. Decide which end you test: lowest V_in with the largest load gives the smallest Iz; highest V_in with no load gives the largest Iz.

Example. With V_in = 15 V, Vz = 10 V, Rs = 500 Ω and Iz(min) = 1 mA: I = 10 mA, I_L(max) = 9 mA and R_L(min) = 10 ÷ 0.009 = 1111 Ω. With the load open and V_in = 20 V, Iz = 10 ÷ 500 = 20 mA and Pz = 0.2 W.

LED, photodiode and solar cell

Light-emitting diode (LED)

a p-n junction of a compound such as GaAs, GaAsP or GaP, operated in forward bias
electrons and holes recombine and the energy released leaves as a photon of hf ≈ Eg
colour of light λ = (1240)/(Eg in eV) nm
typical forward voltage 1.5 V to 3 V
the series resistor is R = (V − V_LED)/(I)
a larger Eg gives a shorter wavelength (green and blue need more than red)
it does not produce light in reverse bias

How to apply. LED means forward bias and light out. Do not use silicon, because its gap is indirect and the emission is weak.

Example. Eg = 1.9 eV: λ = 1240 ÷ 1.9 = 653 nm, red. On 5 V with 2 V across the LED and 20 mA: R = (5 − 2) ÷ 0.020 = 150 Ω.

Photodiode

a p-n junction used in reverse bias, with a window for light
photons with hf ≥ Eg make electron–hole pairs in the depletion region
the field sweeps them across, so the reverse current rises with the light intensity
the current without light is the small dark current
it is used to detect light signals and to count photons
I_photo ∝ intensity (the number of photons per second)

How to apply. Reverse bias plus light gives a larger reverse current. The change in current measures the intensity.

Example. 1 μW of 620 nm light: N = 10⁻⁶ × 620 × 10⁻⁹ ÷ 1.99 × 10⁻²⁵ = 3.1 × 10¹² photons per second. If every photon makes one pair, I = 3.1 × 10¹² × 1.6 × 10⁻¹⁹ = 0.5 μA.

Solar cell

a p-n junction with a large area, no external bias
photons with hf ≥ Eg make pairs near the junction and the field separates them, giving an emf
open-circuit voltage Voc about 0.5 V to 0.6 V for Si; short-circuit current Isc
the I–V curve lies in the fourth quadrant
maximum power Pm = FF × Voc × Isc (FF the fill factor, less than 1)
efficiency η = (Pm)/(P_in) with P_in = (intensity) × (area)

How to apply. A solar cell is a source, not a load: its curve is in the fourth quadrant. Efficiency is the electrical power divided by the light power received.

Example. Voc = 0.6 V, Isc = 3.0 A, FF = 0.75: Pm = 0.75 × 0.6 × 3.0 = 1.35 W. On 10 W of light, η = 1.35 ÷ 10 = 13.5 %.

Comparing the three optical diodes

LED: forward bias, converts electric energy to light
photodiode: reverse bias, converts light to a current signal that depends on intensity
solar cell: no bias, converts light to electric power
in all three the photon energy is near the band gap
the LED and the laser diode need a direct-gap material

How to apply. Match the bias: forward for LED, reverse for photodiode, none for solar cell.

Example. A remote control uses an infrared LED (forward bias) and a photodiode (reverse bias) in the receiver.

Logic gates and Boolean algebra

OR, AND and NOT gates

OR: Y = A + B; output 1 if at least one input is 1
AND: Y = A·B; output 1 only if both inputs are 1
NOT: Y = A̅; the output is the opposite of the input
outputs for AB = 00, 01, 10, 11: OR 0, 1, 1, 1; AND 0, 0, 0, 1
NOT: A = 0 gives 1, A = 1 gives 0
switch picture: OR is two switches in parallel, AND is two switches in series

How to apply. Learn the three tables as sentences: OR is any one, AND is all, NOT is the opposite.

Example. Inputs A = 1 and B = 0: OR gives 1, AND gives 0, NOT A gives 0.

NAND and NOR gates

NAND: Y = NOT(A·B) = A̅ + B̅; AND followed by NOT
NOR: Y = NOT(A + B) = A̅·B̅; OR followed by NOT
outputs for AB = 00, 01, 10, 11: NAND 1, 1, 1, 0; NOR 1, 0, 0, 0
NAND is 0 only when both inputs are 1; NOR is 1 only when both inputs are 0

How to apply. For NAND write the AND table and then flip every output. For NOR write the OR table and flip every output.

Example. Inputs A = 1 and B = 1: NAND gives 0 and NOR gives 0. Inputs 0 and 0: NAND gives 1 and NOR gives 1.

Universal gates

any logic function can be made from NAND gates alone, or from NOR gates alone
NAND: NOT = both inputs joined, Y = NOT(A·A) = A̅
NAND: AND = a NAND followed by a NAND used as NOT (2 gates)
NAND: OR = a NAND used as NOT on each input, then a NAND (3 gates), because NOT(A̅·B̅) = A + B
NOR: NOT = both inputs joined
NOR: OR = a NOR followed by a NOR as NOT (2 gates)
NOR: AND = a NOR used as NOT on each input, then a NOR (3 gates), because NOT(A̅ + B̅) = A·B

How to apply. Use the two moves: join the inputs to make a NOT, and put a NOT before or after to change the gate. Count the gates.

Example. To make an OR from NAND gates: A and B each go into a NAND with both inputs joined (giving A̅ and B̅), then both go into a third NAND: Y = NOT(A̅·B̅) = A + B.

Boolean identities and De Morgan’s laws

A + 0 = A
A + 1 = 1
A·0 = 0
A·1 = A
A + A = A
A·A = A
A + A̅ = 1
A·A̅ = 0
NOT(A̅) = A
De Morgan: NOT(A + B) = A̅·B̅ and NOT(A·B) = A̅ + B̅
absorption: A + A·B = A and A·(A + B) = A
A + A̅·B = A + B

How to apply. Use De Morgan to push a bar into brackets: change the sign (+ to ·, or the other way) and put a bar on each letter.

Example. NOT(A + B) + A·B: for A = 1, B = 1 this is 0 + 1 = 1; for A = 1, B = 0 it is 0 + 0 = 0.

Output of a gate network

work step by step from the inputs to the output, writing the output of every gate
NOT on both inputs of an AND gives NOR: A̅·B̅
NOT on both inputs of an OR gives NAND: A̅ + B̅
AND followed by NOT gives NAND; OR followed by NOT gives NOR
OR of A·B̅ and A̅·B gives the XOR output (0, 1, 1, 0 for AB = 00, 01, 10, 11)

How to apply. Write the output of every gate on the diagram, in the order of the signal. Check with all four input pairs.

Example. Y = (A + B)·NOT(A·B): for AB = 00, 01, 10, 11 it gives 0, 1, 1, 0, which is the XOR output.

Simplifying a Boolean expression

use the identities to cut the number of gates
A + A̅·B = A + B
A·B + A·B̅ = A
A·(A̅ + B) = A·B
(A + B)·(A + B̅) = A
a quick check: make the truth table of both sides and compare

How to apply. Try an identity first; if you are unsure, test all four input pairs.

Example. Y = A + A̅·B: for AB = 00, 01, 10, 11, A + A̅B = 0, 1, 1, 1, which is the same as A + B.

Gates made with diodes and resistors

OR gate: two diodes with the anodes at the inputs and the cathodes joined to a resistor to ground
output high if any input is high (about V − 0.7 V for a real diode)
AND gate: two diodes with the cathodes at the inputs and the anodes joined to a resistor to +V
output low if any input is low
NOT gate: needs a transistor (an amplifying device); a diode alone cannot invert

How to apply. In the diode OR gate the highest input drives the output; in the diode AND gate the lowest input holds the output down.

Example. In the diode AND gate with inputs 5 V and 0 V, the diode at the 0 V input conducts and the output is about 0.7 V, a logic 0.

Input and output waveforms

draw the inputs in time slots of equal width and apply the truth table in each slot
A = 1, 1, 0, 0 and B = 1, 0, 1, 0 in four slots: AND 1, 0, 0, 0
OR 1, 1, 1, 0
NAND 0, 1, 1, 1
NOR 0, 0, 0, 1
a change at the input shows at the output with no change of the shape

How to apply. Divide the time axis by every change of A or B, then read the output slot by slot.

Example. A = 1100 and B = 1010 into an OR gate give Y = 1110, and into a NOR gate Y = 0001.

Most asked question types

How do I solve “Classify a solid from its band gap or resistivity” questions in JEE Main?

The gap or the resistivity of a material is given. Say whether it is a conductor, a semiconductor or an insulator. 1. Eg = 0 (overlap) is a conductor. 2. 0 < Eg < 3 eV is a semiconductor. 3. Eg > 3 eV is an insulator. Example: Eg = 1.1 eV: semiconductor (Si).

How do I solve “Wavelength for a band gap” questions in JEE Main?

The band gap is given. Find the longest wavelength that makes electron–hole pairs, or the colour of an LED. 1. λ = 1240 ÷ Eg in nm. 2. Longer wavelengths do not excite the crystal. 3. A larger gap gives a shorter wavelength. Example: Si, 1.1 eV: 1127 nm.

How do I solve “n-type or p-type from the dopant” questions in JEE Main?

The dopant is given (P, As, B, Al...). Name the type, the majority and minority carriers and the position of the impurity level. 1. Pentavalent: n-type, donor level below the CB. 2. Trivalent: p-type, acceptor level above the VB. 3. The crystal stays neutral. Example: Boron in Si: p-type, holes are the majority.

How do I solve “Minority concentration from nₑ nₕ = nᵢ²” questions in JEE Main?

The doping or the majority concentration and nᵢ are given. Find the minority concentration. 1. Majority ≈ doping concentration. 2. nₕ = nᵢ² ÷ nₑ. 3. Check that the product equals nᵢ². Example: nₑ = 5 × 10²² m⁻³: nₕ = 4.5 × 10⁹ m⁻³.

How do I solve “Current from the carrier concentrations and drift speeds” questions in JEE Main?

nₑ, nₕ, the speeds (or μ and E) and the area are given. Find the current. 1. v = μE if needed. 2. I = eA (nₑ vₑ + nₕ vₕ). 3. Add the electron and hole parts. Example: 1 mm², 5 × 10²⁰ and 4 × 10²⁰: 52.8 μA.

How do I solve “Depletion layer, barrier and bias” questions in JEE Main?

A statement or a diagram about the p-n junction is given. Say how the width of the layer, the barrier and the current change with the bias. 1. Forward: barrier V₀ − V, layer narrower. 2. Reverse: barrier V₀ + V, layer wider. 3. The current is large in forward bias and tiny in reverse bias. Example: Forward bias of 0.5 V on Si: barrier 0.2 V.

How do I solve “Reading the I–V characteristic” questions in JEE Main?

The graph of a diode is given. Find the knee voltage, the breakdown voltage or the dynamic resistance. 1. The knee is the forward voltage where the current rises. 2. r = ΔV ÷ ΔI on the steep part. 3. The reverse current is in μA until breakdown. Example: 10 mA to 20 mA over 0.1 V: 10 Ω.

How do I solve “Current in a circuit with ideal diodes” questions in JEE Main?

A battery, resistors and one or more ideal diodes are given. Find the current or the potential at a point. 1. Decide forward or reverse for each diode. 2. Replace by a wire or a gap. 3. Solve and check. Example: 10 V, 2 kΩ and 3 kΩ with one branch cut: 2 mA.

How do I solve “Circuits with real silicon or germanium diodes” questions in JEE Main?

A circuit has diodes with drops of 0.7 V (Si) or 0.3 V (Ge). Find the current or the voltage across a resistor. 1. Subtract the drop of each conducting diode. 2. Divide the rest by R. 3. Diodes in parallel keep the same drop. Example: 5 V, Si diode, 1 kΩ: 4.3 mA.

How do I solve “Output frequency of a rectifier” questions in JEE Main?

The input frequency and the type of rectifier are given. Find the frequency of the output pulses. 1. Half-wave: f_out = f. 2. Full-wave (or bridge): f_out = 2f. 3. Count the humps per cycle. Example: 50 Hz mains: 50 Hz or 100 Hz.

How do I solve “Average and rms output of a rectifier” questions in JEE Main?

The peak voltage of the input is given. Find the dc value, the rms value or the ripple factor. 1. Half-wave: Vdc = Vm/π, Vrms = Vm/2. 2. Full-wave: Vdc = 2Vm/π, Vrms = Vm/√2. 3. Subtract 0.7 V per conducting Si diode for a real circuit. Example: Vm = 10 V: 3.18 V and 6.37 V.

How do I solve “Rectifier waveform and which diode conducts” questions in JEE Main?

A circuit with one or two diodes and an a.c. input is given. Draw the output or say which diode conducts in a half cycle. 1. A diode conducts when its anode is positive. 2. Take each half cycle separately. 3. Reverse the negative half for the full-wave circuit. Example: Centre-tap circuit: D1 in the positive, D2 in the negative half cycle.

How do I solve “Ripple with a filter capacitor” questions in JEE Main?

The load current, the output frequency and the capacitor are given. Find the ripple voltage. 1. f_out = f or 2f. 2. ΔV = I ÷ (f_out C). 3. A larger C or f_out gives a smaller ripple. Example: 20 mA, 100 Hz, 1000 μF: 0.2 V.

How do I solve “Zener regulator: the currents” questions in JEE Main?

V_in, Vz, Rs and R_L are given. Find the current in Rs, the load current and the Zener current. 1. I = (V_in − Vz) ÷ Rs. 2. I_L = Vz ÷ R_L. 3. Iz = I − I_L. Example: 15 V, 10 V, 500 Ω, 2 kΩ: 10, 5 and 5 mA.

How do I solve “Zener regulator: limits of load and input” questions in JEE Main?

The range of the input voltage or the load is given. Find the smallest load resistance, the largest Zener current or the power in the Zener. 1. Iz is least for the lowest V_in and the heaviest load. 2. Iz is greatest for the highest V_in and no load. 3. P = Vz Iz. Example: Load open, 20 V: Iz = 20 mA and P = 0.2 W.

How do I solve “LED, photodiode and solar cell: bias and colour” questions in JEE Main?

The device and its bias or its gap are given. Name the bias, the energy conversion or the wavelength. 1. LED: forward bias, light out, λ = 1240/Eg. 2. Photodiode: reverse bias, current ∝ light. 3. Solar cell: no bias, fourth quadrant, light to power. Example: Eg = 1.9 eV: 653 nm, red.

How do I solve “Solar cell power and efficiency” questions in JEE Main?

Voc, Isc, the fill factor, the area and the light intensity are given. Find the maximum power or the efficiency. 1. Pm = FF × Voc × Isc. 2. P_in = intensity × area. 3. η = Pm ÷ P_in. Example: 0.6 V, 3 A, FF 0.75, 10 W of light: 13.5 %.

How do I solve “Truth table of a single gate” questions in JEE Main?

A gate is named or its symbol is drawn. Give its output for the input pairs, or identify the gate from its table. 1. AND 0001, OR 0111 for AB = 00, 01, 10, 11. 2. NAND 1110, NOR 1000. 3. NOT reverses the input. Example: Table 1, 1, 1, 0: NAND.

How do I solve “Output of a combination of gates” questions in JEE Main?

A network of gates is drawn. Find the output Y for given inputs or the equivalent single gate. 1. Write the output of each gate in order. 2. Check all four input pairs. 3. Name the gate that has the same table. Example: NOT on both inputs of an AND is a NOR.

How do I solve “NAND or NOR as a universal gate” questions in JEE Main?

A gate (NOT, AND, OR) is to be made from NAND gates alone or NOR gates alone. Give the connection or the number of gates. 1. Join the inputs of a NAND or NOR to get NOT. 2. AND from NAND: 2 gates; OR from NAND: 3 gates. 3. OR from NOR: 2 gates; AND from NOR: 3 gates. Example: OR from NAND: A̅ and B̅ into a third NAND.

How do I solve “Boolean simplification and De Morgan” questions in JEE Main?

A Boolean expression is given. Simplify it or find the equivalent gate. 1. Use A + A̅B = A + B and absorption. 2. De Morgan: NOT(A + B) = A̅B̅. 3. Test with a truth table. Example: A + A̅B = A + B.

How do I solve “Input and output waveforms of a gate” questions in JEE Main?

Two input waveforms are shown for a gate. Draw or choose the output. 1. Split the time axis at every edge. 2. Use the truth table in each slot. 3. Join the slots. Example: A = 1100, B = 1010 into NOR: 0001.

Common myths and the truth

Myth: An n-type crystal is negatively charged because it has extra electrons. Truth: Each extra electron comes from a neutral donor atom, which becomes a fixed positive ion. The crystal is neutral.
Myth: A p-type crystal has holes, so it is positively charged. Truth: Each hole comes with a negative acceptor ion. The crystal as a whole is neutral.
Myth: A diode obeys Ohm’s law like a resistor. Truth: Its I–V curve is not a straight line. The current is almost zero below the knee and rises steeply after it.
Myth: No current flows in a reverse-biased diode at all. Truth: A very small leakage current (μA) flows, carried by the minority carriers, until the breakdown.
Myth: A rectifier makes the output a perfectly steady dc voltage. Truth: It makes a pulsating dc. A filter capacitor is needed to smooth it.
Myth: A full-wave rectifier has the same output frequency as a half-wave rectifier. Truth: The full-wave output has twice as many pulses per cycle, so its frequency is 2f.
Myth: The Zener diode lowers the current of the load. Truth: The Zener keeps the voltage constant by taking the extra current away from the load.
Myth: A solar cell is just a photodiode with a battery. Truth: A solar cell has no external bias; it produces its own emf and delivers power.
Myth: A gate with two inputs always needs two different gates to be made universal. Truth: One kind of gate is enough. NAND alone or NOR alone can give every other gate.
Myth: A semiconductor behaves like a metal when it is heated. Truth: Heating a semiconductor raises the number of carriers, so its resistance falls. A metal’s resistance rises.

Mistakes to avoid

Forward bias is p to the positive terminal; many students reverse it.
A reverse-biased diode does not conduct; do not put a 0.7 V drop on it.
The output frequency of the full-wave rectifier is 2f, not f.
Vdc is not Vrms: Vdc = Vm/π (half-wave) and 2Vm/π (full-wave).
The Zener is connected in reverse bias; the series resistor is always needed.
In nₑ nₕ = nᵢ², the minority concentration falls when the majority rises.
NAND is not the same as NOT-A AND NOT-B: that is NOR. NAND is A̅ + B̅.
An LED needs forward bias and a photodiode needs reverse bias.

Simulations for Electronic Devices

Electrons and holes in doped silicon — Heat silicon or add donor atoms and see how the electron and hole concentrations change.
P–N junction diode — Apply a voltage and watch the depletion region change with forward or reverse bias.
Diode I–V characteristic — Sweep the voltage across a diode and trace its current.
LED colour and band gap — Change the semiconductor band gap and see the colour of light the LED emits.
Logic gates — Change two binary inputs and inspect the output of a logic gate.
Half-wave rectifier — Use a diode to pass the positive part of an alternating voltage.
Rectifier with a smoothing capacitor — Add a reservoir capacitor after a rectifier. It charges at each peak and slowly discharges into the load.
Solar cell: I–V curve and maximum power — Change the sunlight and the load. The operating point sits where the cell curve meets the load line.
Transistor as a switch — Drive a transistor through a base resistor and see when a collector load is fully switched on.
Zener voltage regulator — Vary the input and load, and discover when a reverse-biased Zener diode can hold the output steady.

More: Class 12 Physics simulations · all JEE Main chapters.